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nuumio: dts/pcie: add configurable delay before pcie bus scan
Default delay in dts is 1000ms. To change it in kernel cmdline use: pcie_rockchip_host.pcie_rk_bus_scan_delay=1000
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+27
-0
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4 files changed

+27
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lines changed

arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -532,6 +532,7 @@
532532
pinctrl-0 = <&pcie_perst>;
533533
vpcie12v-supply = <&vcc12v_dcin>;
534534
vpcie3v3-supply = <&vcc3v3_pcie>;
535+
bus-scan-delay-ms = <1000>;
535536
status = "okay";
536537
};
537538

drivers/pci/controller/pcie-rockchip-host.c

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -24,6 +24,7 @@
2424
#include <linux/kernel.h>
2525
#include <linux/mfd/syscon.h>
2626
#include <linux/module.h>
27+
#include <linux/moduleparam.h>
2728
#include <linux/of_address.h>
2829
#include <linux/of_device.h>
2930
#include <linux/of_pci.h>
@@ -39,6 +40,9 @@
3940
#include "../pci.h"
4041
#include "pcie-rockchip.h"
4142

43+
static int bus_scan_delay = -1;
44+
module_param_named(pcie_rk_bus_scan_delay, bus_scan_delay, int, S_IRUGO);
45+
4246
static void rockchip_pcie_enable_bw_int(struct rockchip_pcie *rockchip)
4347
{
4448
u32 status;
@@ -953,6 +957,7 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
953957
struct pci_host_bridge *bridge;
954958
struct resource *bus_res;
955959
int err;
960+
u32 delay = 0;
956961

957962
if (!dev->of_node)
958963
return -ENODEV;
@@ -1015,6 +1020,18 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
10151020
bridge->map_irq = of_irq_parse_and_map_pci;
10161021
bridge->swizzle_irq = pci_common_swizzle;
10171022

1023+
/* Prefer command-line param over device tree */
1024+
if (bus_scan_delay > 0) {
1025+
delay = bus_scan_delay;
1026+
dev_info(dev, "wait %u ms (from command-line) before bus scan\n", delay);
1027+
} else if (rockchip->bus_scan_delay > 0 && bus_scan_delay < 0) {
1028+
delay = rockchip->bus_scan_delay;
1029+
dev_info(dev, "wait %u ms (from device tree) before bus scan\n", delay);
1030+
}
1031+
if (delay > 0) {
1032+
msleep(delay);
1033+
}
1034+
10181035
err = pci_scan_root_bus_bridge(bridge);
10191036
if (err < 0)
10201037
goto err_remove_irq_domain;

drivers/pci/controller/pcie-rockchip.c

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -150,6 +150,14 @@ int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip)
150150
return PTR_ERR(rockchip->clk_pcie_pm);
151151
}
152152

153+
err = of_property_read_u32(node, "bus-scan-delay-ms", &rockchip->bus_scan_delay);
154+
if (err) {
155+
dev_info(dev, "no bus-scan-delay-ms in device tree, default 0 ms\n");
156+
rockchip->bus_scan_delay = 0;
157+
} else {
158+
dev_info(dev, "bus-scan-delay-ms in device tree is %u ms\n", rockchip->bus_scan_delay);
159+
}
160+
153161
return 0;
154162
}
155163
EXPORT_SYMBOL_GPL(rockchip_pcie_parse_dt);

drivers/pci/controller/pcie-rockchip.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -308,6 +308,7 @@ struct rockchip_pcie {
308308
phys_addr_t msg_bus_addr;
309309
bool is_rc;
310310
struct resource *mem_res;
311+
u32 bus_scan_delay;
311312
};
312313

313314
static u32 rockchip_pcie_read(struct rockchip_pcie *rockchip, u32 reg)

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